Le CEA et PSMC associent architecture Risc-V et photonique sur silicium au service de l’IA
法国原子能与替代能源委员会电子与信息技术实验室（CEA-Leti）、法国原子能与替代能源委员会系统与电路技术实验室（CEA-List）与台湾晶圆代工厂力积电（PSMC）宣布建立合作，旨在将Risc-V核心架构与硅光子技术结合，应用于三维架构和中介层，以突破当前技术限制，开发性能更高、能耗更低的AI平台。
此次合作聚焦于利用硅光子技术实现芯片间高速光互连，结合Risc-V开源指令集架构的灵活性，共同设计面向人工智能的专用硬件。三方计划通过三维堆叠和中介层集成技术，优化数据处理与传输效率，解决传统电子互连在带宽和功耗上的瓶颈。
CEA-Leti在硅光子学和3D集成领域拥有先进研发能力，CEA-List专注于嵌入式系统与集成电路设计，力积电则提供半导体制造工艺支持。合作旨在将实验室技术转化为可量产的解决方案，为下一代AI加速器、数据中心和高性能计算提供核心硬件支持。
该合作反映了欧洲与亚洲在半导体前沿技术领域的协同创新趋势，通过结合开源架构与先进光子技术，有望推动AI硬件在能效比和计算密度上的显著提升。
French research institute CEA and Taiwanese foundry PSMC are partnering to combine RISC-V processor cores with silicon photonics in advanced 3D architectures, aiming to create more powerful and energy-efficient AI computing platforms. The collaboration involves CEA-Leti (microelectronics) and CEA-List (software and systems integration) working with Powerchip Semiconductor Manufacturing Corporation (PSMC).
The joint effort will focus on integrating open-source RISC-V CPU cores with silicon photonic interconnects using 3D stacking and interposer technologies. This approach seeks to overcome current bottlenecks in data movement and bandwidth that limit AI accelerator performance and energy efficiency. Silicon photonics—using light to transmit data on-chip and between chips—promises significantly higher bandwidth and lower power consumption compared to traditional electrical interconnects, especially over short distances.
The partnership will leverage PSMC's semiconductor manufacturing expertise and CEA's research in 3D integration, heterogeneous systems, and photonic-electronic co-design. A key goal is to develop prototype platforms demonstrating the synergy between RISC-V's architectural flexibility and photonic interconnects for AI workloads. The collaboration is framed as part of a broader European strategy to build sovereign capabilities in next-generation computing hardware, reducing dependence on proprietary architectures and foreign supply chains for critical AI infrastructure.
Le CEA-Leti, le CEA-List et le fondeur taïwanais collaborent pour intégrer la technologie de cœurs Risc-V et la photonique sur silicium dans des architectures 3D et des interposeurs, avec pour objectif de dépasser les limites actuelles et concevoir des plateformes d’IA plus performantes et sobres en énergie. Le CEA-Leti et le CEA-List annoncent un partenariat […]
Cet article Le CEA et PSMC associent architecture Risc-V et photonique sur silicium au service de l’IA a été publié par VIPress.net.
CEA institutes and Taiwanese foundry PSMC are co-developing 3D-integrated RISC-V and silicon photonics to create more powerful and energy-efficient AI hardware platforms.
CEA-Leti & CEA-List — French public R&D institutes for electronics and software.
PSMC (Powerchip Semiconductor Manufacturing Corp.) — Taiwanese semiconductor foundry.
Strongly track — This collaboration directly tackles key bottlenecks in AI compute performance and energy consumption.